Index: libraries/source/fcollada/src/Makefile
===================================================================
--- libraries/source/fcollada/src/Makefile	(revision 13633)
+++ libraries/source/fcollada/src/Makefile	(working copy)
@@ -1,4 +1,5 @@
 OS_ARCH := $(shell uname -s)
+OS_CPU := $(shell uname -p)
 
 ifeq ($(OS_ARCH),Darwin)
 PIC_FLAGS ?= -fPIC
@@ -9,9 +10,13 @@
 
 CXX ?= g++
 CXXFLAGS += -fvisibility=hidden -W -Wall -Wno-unused-parameter -Wno-unused-function -Wno-unused-but-set-variable $(OS_DEFINE) $(PIC_FLAGS) $(CPPFLAGS)
+# If we're compiling on *nix ARM, target Cortex-A15 CPUs with NEON ***mfloat-abi setting must be the same on everything linked to FCollada***
+ifeq ($(OS_CPU),armv7l)
+CXXFLAGS += -mtune=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=hard
+endif
 CXXFLAGS_DEBUG := -O0 -g -D_DEBUG -DRETAIL
 CXXFLAGS_RELEASE := -O1 -DNDEBUG -DRETAIL
-# (-O2 with gcc 4.3 causes linker errors when using this library, for unknown reasons, so stick with -O1)
+# (-O2 with gcc 4.3 causes linker errors when using this library, for unknown reasons, so stick with -O1 until gcc >4.3 is typical.)
 CXXFLAGS_TEST := -O0 -g -D_DEBUG
 LIBS += `pkg-config libxml-2.0 --libs`
 INCLUDES += -IFCollada `pkg-config libxml-2.0 --cflags`
Index: libraries/source/fcollada/src/FCollada/FUtils/FUAssert.cpp
===================================================================
--- libraries/source/fcollada/src/FCollada/FUtils/FUAssert.cpp	(revision 13633)
+++ libraries/source/fcollada/src/FCollada/FUtils/FUAssert.cpp	(working copy)
@@ -44,6 +44,8 @@
 #elif defined (__APPLE__)
 		Debugger();
 		//SysBreak();
+#elif defined (__arm__)
+		__asm__("bkpt 0");
 #else
 		// AFAIK This is available on all X86 platforms
 		__asm__("int $0x03");
Index: libraries/source/nvtt/src/src/nvcore/nvcore.h
===================================================================
--- libraries/source/nvtt/src/src/nvcore/nvcore.h	(revision 13633)
+++ libraries/source/nvtt/src/src/nvcore/nvcore.h	(working copy)
@@ -67,6 +67,7 @@
 // NV_CPU_X86
 // NV_CPU_X86_64
 // NV_CPU_PPC
+// NV_CPU_ARM
 
 #define NV_CPU_STRING 	POSH_CPU_STRING
 
@@ -76,6 +77,8 @@
 #	define NV_CPU_X86 1
 #elif defined POSH_CPU_PPC
 #	define NV_CPU_PPC 1
+#elif defined POSH_CPU_STRONGARM
+#	define NV_CPU_ARM 1
 #else
 #	error "Unsupported CPU"
 #endif
Index: build/premake/premake4.lua
===================================================================
--- build/premake/premake4.lua	(revision 13633)
+++ build/premake/premake4.lua	(working copy)
@@ -26,7 +26,7 @@
 
 dofile("extern_libs4.lua")
 
--- detect CPU architecture (simplistic, currently only supports x86 and amd64)
+-- detect CPU architecture (simplistic, currently only supports x86, amd64 and ARM)
 arch = "x86"
 if _OPTIONS["android"] then
 	arch = "arm"
@@ -47,6 +47,8 @@
 			arch = "amd64"
 		elseif string.find(machine, "i.86") == 1 then
 			arch = "x86"
+		elseif string.find(machine, "arm") == 1 then
+			arch = "arm"
 		else
 			print("WARNING: Cannot determine architecture from GCC, assuming x86")
 		end
@@ -262,9 +264,13 @@
 			if arch == "arm" then
 				-- disable warnings about va_list ABI change
 				buildoptions { "-Wno-psabi" }
-
-				-- target Cortex-A9 CPUs with NEON
-				buildoptions { "-mthumb -mcpu=cortex-a9 -mfpu=neon -mfloat-abi=softfp" }
+				if _OPTIONS["android"] then
+					-- target generic arm CPUs with NEON
+					buildoptions { "-mtune=generic-arm -mfpu=neon -mfloat-abi=softfp" }
+				else
+					-- target Cortex-A15 CPUs with NEON
+					buildoptions { "-mtune=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=hard" }
+				end
 			end
 
 			if _OPTIONS["coverage"] then
Index: source/lib/sysdep/arch/arm/arm.cpp
===================================================================
--- source/lib/sysdep/arch/arm/arm.cpp	(revision 13633)
+++ source/lib/sysdep/arch/arm/arm.cpp	(working copy)
@@ -28,7 +28,6 @@
 
 #include "lib/sysdep/cpu.h"
 
-#include <android/log.h>
 intptr_t cpu_AtomicAdd(volatile intptr_t* location, intptr_t increment)
 {
 	return __sync_fetch_and_add(location, increment);
@@ -41,21 +40,7 @@
 
 bool cpu_CAS64(volatile i64* location, i64 expected, i64 newValue)
 {
-	// Current versions of GCC don't implement this on ARM:
-	//   return __sync_bool_compare_and_swap(location, expected, newValue);
-	
-	// http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=40fb79c8a88625504857d44de1bc89dc0341e618
-	// adds support for
-	//   return __kernel_cmpxchg64(&expected, &newValue, (long long*)location) == 0;
-	// but only for Linux kernel 3.1
-	
-	// Maybe we can do it with user-space assembly assuming a modern-enough CPU?
-	// That sounds non-trivial so let's just cheat
-#warning TODO: atomic cpu_CAS64 on ARM
-	if (*location != expected)
-		return false;
-	*location = newValue;
-	return true;
+	return __sync_bool_compare_and_swap(location, expected, newValue);
 }
 
 const char* cpu_IdentifierString()
